= HF8V = / = SP8WJT = / = SP0106RZ =
HF-17140
PROJECT: HF-17140
DESCRIPTION: TV circuit (VIF/SIF)
TYPE:
BRAND:
STATUS: n
PROJECT START DATE:
LOCALISATION: PG
DOCUMENTATION:
PCB: TPD57140
DIMENSIONS:
TDA9840 and TDA9861 can be controlled by I2C bus. Parametres like level, balance, right/left channel level, bass, etc can be adjusted.
Components:
TDA9815 - Multistandard/MAC VIF-PLL with QSS-IF and dual FM-PLL/AM demodulator [1]
TDA9840 - TV and VTR stereo/dual sound processor with digital identification and I2C-bus control [2]
TDA9861 - Universal HiFi audio processor for TV [3]
TDA9861 FUNCTIONAL DESCRIPTION
The TDA9861 consists of the following functions:
source select switching block
loudspeaker channel with effect controls
headphone channel
two port outputs for general purpose
I2C bus control
Source select switching block
The TDA9861 selects and switches the input signals from three stereo or six mono sources as there are MAIN, AUX and SCART (Fig.1) to one of the outputs SCART, loudspeaker and headphone (crossbar-switching Table 3).
Due to the fact, that the main channel (LINE outputs) is looped outside the circuit (from pins 9 and 24 to pins 10 and 23), signals can be used as LINE output or to insert a ‘surround sound decoder’.
Loudspeaker channel
Volume control is divided into the parts volume 1 and volume 2 / balance. The first part (55 dB) controls left and right channels simultaneously; the second part (23 dB) controls volume and balance of left and right channels independently. Treble control provides a control range from
-12 to +12 dB and bass control from -12 to +15 dB. Extended bass control can be provided by an external T-network from -15 to +19 dB (2 dB steps).
Effect controls
‘Linear stereo’, ‘stereo with spatial effect (30% or 52% anti-phase crosstalk)’ and ‘forced mono with or without pseudo-stereo effect’ are controlled by three bits. A muting of 85 dB is provided.
Headphone channel
The headphone channel is only equipped with volume / balance control. A muting of 85 dB is provided.
I2C hardware addresses: 0x80, 0x82
TDA9840 FUNCTIONAL DESCRIPTION
The TDA9840 receives the signals from the FM-demodulators in a TV two sound-carrier system. The circuit is realized by the H00485 bipolar process. The IC is intended for use in economic TV and VTR
receivers. Therefore optimum relationship between integration of functions and use of external components has been striven for. Additionally a new type of
identification circuit has been developed.
AF signal handling
The input AF signals, derived from the two sound carriers, are processed in analog form using operational amplifiers. The circuit incorporates level and stereo-adjustment to correct the spreading in the FM
detector output levels. Dematrixing uses the technique of two amplifiers processing the AF signals. Finally, a source selector provides the facility to route the mono signal through to the outputs (‘forced mono’).
De-emphasis is performed by two RC low-pass filter networks with internal resistors and external capacitors. This provides a frequency response with the tolerances given in Fig.4.
A source selector, controlled via the I2C-bus, allows selection of the different modes of operation in accordance with the transmitted signal. The device was designed for a nominal input signal (FM: 54% modulation is equivalent to
deltaf= ± 27 kHz / AM: m = 0.54) of 250 mV RMS (Vi1 ,Vi2), respectively 500 mV RMS (Vi3 ,Vi4). A nominal gain of 6 dB for V i1 and V i2 signals and 0 dB for Vi3 and Vi4
signals is built-in. By using rail-to-rail operational amplifiers, the clipping level (THD <= 1.5%) is 1.6 V RMS for VP = 5 V and 2.65 V RMS for VP= 8 V at outputs Vo1,Vo2,Vo3 and Vo4. Care has been taken to minimize
switching plops. Also total harmonic distortion and random noise are considerably reduced.
Identification
The pilot signal is fed via an external RC high-pass filter and single tuned LC band-pass filter to the input of a gain controlled amplifier. The external LC band-pass filter in combination with the external RC high-pass filter should
have a loaded Q-factor of about 40 to 50 to ensure the highest identification sensitivity. By using a fixed coil (±5%) to save the alignment (see Fig.2), a Q-factor of about 12 is proposed. This may cause a loss in sensitivity of about
2 to 3 dB. A digital PLL circuit generates a reference carrier, which is synchronized with the pilot carrier. This reference carrier and the gain controlled pilot signal are fed to the AM-synchronous demodulator. The demodulator detects the identification signal, which is fed
through a low-pass filter with external capacitor CLP (pin 3) to a Schmitt-trigger for pulse shaping and suppression of low level spurious signal components. This is a measure against mis-identification. The identification signal is amplified and fed through an AGC low-pass filter with external capacitor
CAGC (pin 2) to obtain the AGC voltage for controlling the gain of the pilot signal amplifier. The identification stages consist of two digital PLL circuits with digital synchronous demodulation and digital integrators to generate the stereo or dual sound identification bits which can be read out via the
I2C-bus. A 10 MHz quartz crystal oscillator provides the reference clock frequency. The corresponding detection bandwidth is larger than ±50 Hz for the pilot carrier signal, so that fp-variations from the transmitter can be tracked in case of missing synchronisation with the horizontal frequency fH.
However the detection bandwidth for the identification signal is made small (approximately ±1 Hz) to reduce mis-identification. Figure 2 shows an example of the alignment-free fpband-pass filter. To achieve the required QL of approximately 12, the Q0 at fp of the coil was chosen to be approximately 25 (effective Q0
including PCB influence). Using coils with other Q0, the RC-network (RFP,CFP) has to be adapted accordingly. It is assumed that the loss factor tan delta of the resonance capacitor is <= 0.01 at fp.
I2C hardware address: 0x84
Sources:
[1] TDA9815 datasheet
[2] TDA9840 datasheet
[3] TDA9861 datasheet
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