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HF-6059


Project Data

PROJECT: HF-6059
DESCRIPTION: Digital System based on PIC18F67K40
STATUS: p
PROJECT START DATE: 2025
LOCALISATION: PL
DOCUMENTATION: TM
DIMENSIONS: 70 x 50 mm

HARDWARE VERSION: 1.01
SOFTWARE VERSION: 0.00


CPU Data

UC NAME: PIC18F67K40
CPU BRAND: MICROCHIP
FAMILY: PIC18F_K_
FLASH: 128K
RAM: 3562
EEPROM: 1024
I/O: 60
MAX CLOCK: 64 MHz
SUPPLY VOLTAGE: 2.3 - 5.5 V
CPU CATALOG NUMBER: UC-507
THN ADDRESS: 0xC9
UC TYPE: 0xB2


Modules

PROJECTSTATUSPCBREMARKS
HF-12259#1wTPD52912#4Microprocessor module (removable)
HF-60259uTPD52919#5Extension Board






Project Info

Digital system planned with microprocessor module HF-12259#1, main board HF-60259 and maybe additional external RAM module. Due to some technical problems and lack of time this project was delayed. Designator HF-6059 will be activated when software will be created what is last lacking element because HF-12259#1 is already assembled and extension board HF-60259 is partly assembled (at least basic functions and ICSP are connected).

Microprocessor PIC18F67K40 has similiar features like ATMEGA128. Even if clock frequency is 64 MHz, 4 clock cycles are needed for one machine cycle, what results in 16 MIPS (exactly as official speed of ATMEGA128, overclockable, btw.). Do you have feeling that those capitalistic guys at Microchip cheating us here ? :)) ATMELS probably multiply its clock for pipelining 4 times but they never said a word about it in datasheets, it was marketed as one machine cycle for one clock cycle.



Software

THOS operating system is planned on this device. It will be manually translated to PIC assembler from AVR sources of similiar systems on ATMEGA64/128 devices.



Sources

[1] Datasheet PIC18F67K40
[2] PIC18F67K40 Microchip product page
[3] HF-60259 Main board for PIC18F67K40 microprocessor module


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